Empirical evaluation of reconfigurable hardware for an RFID application.

摘要

Radio Frequency Identification (RFID) is an infant technology evolving around us every day. Middleware is a software application that provides the path and management for raw RFID data, processing it for a network or system application. As the technology develops, an unprecedented amount of raw data will be created overwhelming current solutions.;This thesis looks at the requirements of Middleware and proposes a design model based around a Field Programmable Gate Array, FPGA. The model uses the conventional Hardware Design Language Verilog, to implement the necessary modules needed to investigate the data processing capabilities of a reconfigurable solution as an RFID system component. The results will be used to determine the effectiveness of the model as an alternative architecture in what is typically a software environment.