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The V compiler: automatic hardware design

机译:V 编译器:自动硬件设计

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The V language describes VLSI systems concisely through the use of sequential algorithmic descriptions. Because V includes high-level constructs such as queues, asynchronous calls, and cycle-blocks, designs are more readily described and optimized into efficient hardware implementations. The implementations can then be tuned for space, time, or other objectives using annotations. From the input description, the V compiler generates both a register-transfer-level specification and a software simulator. Thus, a single description is suitable for both functional simulation and input to logic synthesis. The author describes parsing. scheduling, and resource sharing using the V compiler. He discusses synthesis and simulation, annotations, and high-level constructs.
机译:V语言通过使用顺序算法描述来简明扼要地描述VLSI系统。由于 V 包含队列、异步调用和周期块等高级构造,因此设计更容易被描述和优化为高效的硬件实现。然后,可以使用注释针对空间、时间或其他目标调整实现。根据输入描述,V 编译器生成寄存器传输级规范和软件模拟器。因此,单一描述既适用于功能仿真,也适用于逻辑合成输入。作者描述了解析。使用 V 编译器进行调度和资源共享。他讨论了合成和模拟、注释和高级结构。

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