IN RECENT YEARS, development of mature semiconductor fabrication technologies has enabled manufacturers to develop the next generation of high-performance, high-speed devices. In addition, device manufacturing techniques integrate analog, digital, and RF modules manufactured in different technologies into SoCs and systems in packages (SiPs) to reduce the end product's form factor (the ratio of the device area to its height). This integration requires that each module and its constituent components be compatible with all other modules in the system. It's also important to minimize the amount of coupled noise between various modules. This is relatively difficult to achieve in SoCs, because the modules are monolithic and are manufactured using the same technology. In a system consisting of digital, analog, RF, and passive components, performance requirements for the different modules vary widely. Typically, digital designs require optimization through technology scaling to minimize delay and leakage, whereas analog modules need a stable process to operate reliably at process-voltage-temperature (PVT) corners. Moreover, RF systems have strict linearity requirements, whereas passive modules have high-quality tolerance needs. During production testing, manufacturers must guarantee each module's performance to ensure flawless integration of the overall system. Validating such integrated systems requires a heterogeneous approach during high-volume production testing. Moreover, production tests for such systems must evaluate the performance of various modules quickly and inexpensively (see the "Test cost and quality issues" sidebar).
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